Stránka 1 z 2
Open PLi 6.1
Napsal: 31 led 2018, 10:45
od JohnCenaWWE
Momentalne ju skusam a vypada ze ide svizne,obraz naozaj krasny oproti Oatv sa my zda lepsi,ostrejsi,cistejsi
dokonca ma aj blindscan
chyba CZ,SK pracujem na tom
zatial testujem
Re: Open PLi 6.1
Napsal: 31 led 2018, 12:08
od JohnCenaWWE
Re: Open PLi 6.1
Napsal: 05 úno 2018, 17:37
od JohnCenaWWE
skusal som aj
ID Team : OE-A
ID Enigma : Alliance
Version : .
About E2 : Enigma2
Kernel : ULK-3.9.2
a cuduj sa svete ide aj na tento kernel len som zatial nezistil vyhody/nevyhody
Re: Open PLi 6.1
Napsal: 28 úno 2018, 20:37
od virusw
Zdravím, o víkendu se chystám nainstalovat tento image. Jenom pro jistotu, v boxu mám kernel 3.3.1, může tam zůstat nebo to bude chtít něco novějšího? Předpokládám, že k nahrátí mám použít AZup 2.2.8? Díky za rady.
Re: Open PLi 6.1
Napsal: 01 bře 2018, 21:31
od JohnCenaWWE
nahraj cely aj s kernelom ,kernel ma 3.3.1 zatial stabilny image ,oatv my dost zahlcoval ram
Re: Open PLi 6.1
Napsal: 26 čer 2018, 00:41
od dusan.novotny
Po dlhšej dobe som sa rozhodol prejsť z Open Pli 2.1 na 6.1 - AzBox Premium HD
- v menu je písmo nastavenia kockované dosť zle čitateľné aj po nastavení HDMI
- prepínanie programov na DO až príliš rýchle, preskakuje to aj o 2 riadky naraz
- nikde som nenašiel Fast Scan
dá sa s tým niečo spraviť? Za každú radu budem vďačný.
Re: Open PLi 6.1
Napsal: 27 čer 2018, 15:12
od dusan.novotny
Tak po otestovaní Open ATV 6.1 som skusil ešte raz nahodiť Open PLi 6.1.
Všetko funguje tak ako má doteraz ani zasek, neskutočna rýchlosť, ba dokonca som musel DO nastaviť pretože prepínanie bolo až príliš rýchle.
Oscam, Cccam, nahravanie, prehrávanie, rýchle návraty, no proste paráda.
Zatiaľ pre mňa najlepší Image.
Re: Open PLi 6.1
Napsal: 27 čer 2018, 21:26
od Fishburn
dusan.novotny píše:Tak po otestovaní Open ATV 6.1 som skusil ešte raz nahodiť Open PLi 6.1.
Všetko funguje tak ako má doteraz ani zasek, neskutočna rýchlosť, ba dokonca som musel DO nastaviť pretože prepínanie bolo až príliš rýchle.
Oscam, Cccam, nahravanie, prehrávanie, rýchle návraty, no proste paráda.
Zatiaľ pre mňa najlepší Image.
mužeš poslat info o přijimači
verze pli verze jádra atd udělat grab screen
díky ,,
co čtečka v režimu irdeto

Re: Open PLi 6.1
Napsal: 15 črc 2018, 14:41
od JohnCenaWWE
ahojte nahral som plugin AzIPTV ale ked ho chcem pustit satel hadze zelenu smrt,prosim vas viete my poradit preco hadze furt zelenu?
tu je e2crash.log
OpenPLi Enigma2 crash log
crashdate=Sun Jul 15 14:23:58 2018
compiledate=Dec 21 2017
skin=MetrixHD/skin.xml
sourcedate=2017-12-20
branch=develop
rev=5781633
component=Enigma2
stbmodel=premium+
kernelcmdline=mem=107m console=ttyS0,115200
nimsockets=NIM Socket 0:
imageissue=openpli 6.1 %h
[eDVBPESReader] Created. Opening demux
[eDVBPESReader] Created. Opening demux
[eDVBPESReader] Created. Opening demux
[eDVBPESReader] Created. Opening demux
Traceback (most recent call last):
File "/usr/lib/enigma2/python/Components/ActionMap.py", line 46, in action
File "/usr/lib/enigma2/python/Screens/PluginBrowser.py", line 138, in save
File "/usr/lib/enigma2/python/Screens/PluginBrowser.py", line 142, in run
File "/home/me/GitHub-NewOE/oe-core/build-azboxme/tmp/work/azboxme-oe-linux/enigma2-plugin-extensions-aziptv-git1+a3be95f81413f40226b0f221b91661109f53a831-r4/git/plugin.py", line 14, in main
File "/usr/lib/enigma2/python/mytest.py", line 297, in open
dlg = self.current_dialog = self.instantiateDialog(screen, *arguments, **kwargs)
File "/usr/lib/enigma2/python/mytest.py", line 240, in instantiateDialog
return self.doInstantiateDialog(screen, arguments, kwargs, self.desktop)
File "/usr/lib/enigma2/python/mytest.py", line 257, in doInstantiateDialog
dlg = screen(self, *arguments, **kwargs)
File "/home/me/GitHub-NewOE/oe-core/build-azboxme/tmp/work/azboxme-oe-linux/enigma2-plugin-extensions-aziptv-git1+a3be95f81413f40226b0f221b91661109f53a831-r4/git/plugin.py", line 4, in PVIPTV
File "/home/me/GitHub-NewOE/oe-core/build-azboxme/tmp/work/azboxme-oe-linux/enigma2-plugin-extensions-aziptv-git1+a3be95f81413f40226b0f221b91661109f53a831-r4/git/IPTV.py", line 18, in <module>
ImportError: cannot import name eTPM
dmesg
..
<4>[ 246.250000] Answering: 0xff 0xff 0xff
<4>[ 246.250000] Ans2reset: warm reset needed.
<4>[ 246.260000] scard_set_param :: clk = 27 | tangox_get_sysclock() = 200250000 | frequency = 3686400 | Mode = 4 | OC = 0
<4>[ 246.270000] Set param..>> Last_rev_msb = 0 || Last_rev_pol = 1
<4>[ 246.450000] Sleep for 100 jiffies.
<4>[ 247.450000] Got response from 5V setting ..
<4>[ 247.450000] Answering: 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x00 0x00 0x01 0x00 0x00 0x01 0x00 0x01 0x00 0x00 0x00 0x01 0x00
<4>[ 247.470000] Ans2reset: warm reset needed.
<4>[ 247.470000] scard_set_param :: clk = 27 | tangox_get_sysclock() = 200250000 | frequency = 3686400 | Mode = 4 | OC = 0
<4>[ 247.490000] Set param..>> Last_rev_msb = 1 || Last_rev_pol = 1
<4>[ 247.670000] Sleep for 100 jiffies.
<4>[ 248.670000] Got response from 5V setting ..
<4>[ 248.670000] Answering: 0x80 0x80 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x80 0x80 0x80 0x00 0x00 0x80 0x00 0x00 0x80 0x00 0x80 0x00 0x00 0x00 0x80 0x00
<4>[ 248.690000] Ans2reset: warm reset needed.
<4>[ 248.690000] scard_set_param :: clk = 27 | tangox_get_sysclock() = 200250000 | frequency = 3686400 | Mode = 4 | OC = 0
<4>[ 248.710000] Set param..>> Last_rev_msb = 1 || Last_rev_pol = 0
<4>[ 248.880000] Sleep for 100 jiffies.
<4>[ 249.880000] Got response from 5V setting ..
<4>[ 249.880000] Answering: 0xff 0xff 0xff
<6>[ 250.170000] IOCTL_SET_DEACTIVATE
<6>[ 251.180000] IOCTL_SET_RESET
<4>[ 251.180000] scard_set_param :: clk = 27 | tangox_get_sysclock() = 200250000 | frequency = 3686400 | Mode = 5 | OC = 0
<4>[ 251.200000] Set param..>> Last_rev_msb = 0 || Last_rev_pol = 0
<4>[ 251.380000] Sleep for 100 jiffies.
<4>[ 252.380000] Got response from 5V setting ..
<4>[ 252.380000] Answering: 0x10 0x8a 0x9f 0xfb 0x96 0x7b 0x33 0xdb
<4>[ 252.390000] Ans2reset: warm reset needed.
<4>[ 252.390000] scard_set_param :: clk = 27 | tangox_get_sysclock() = 200250000 | frequency = 3686400 | Mode = 5 | OC = 0
<4>[ 252.410000] Set param..>> Last_rev_msb = 0 || Last_rev_pol = 1
<4>[ 252.600000] Sleep for 100 jiffies.
<4>[ 253.600000] Got response from 5V setting ..
<4>[ 253.600000] Answering: 0xef 0x75 0x60 0x04 0x69 0x84 0xcc 0x24
<4>[ 253.610000] Ans2reset: warm reset needed.
<4>[ 253.620000] scard_set_param :: clk = 27 | tangox_get_sysclock() = 200250000 | frequency = 3686400 | Mode = 5 | OC = 0
<4>[ 253.640000] Set param..>> Last_rev_msb = 1 || Last_rev_pol = 1
<4>[ 253.830000] Sleep for 100 jiffies.
<4>[ 254.830000] Got response from 5V setting ..
<4>[ 254.830000] Answering: 0xf7 0xae 0x06 0x20 0x96 0x21 0x33 0x24
<4>[ 254.840000] Ans2reset: warm reset needed.
<4>[ 254.840000] scard_set_param :: clk = 27 | tangox_get_sysclock() = 200250000 | frequency = 3686400 | Mode = 5 | OC = 0
<4>[ 254.860000] Set param..>> Last_rev_msb = 1 || Last_rev_pol = 0
<4>[ 255.040000] Sleep for 100 jiffies.
<4>[ 256.040000] Got response from 5V setting ..
<4>[ 256.040000] Answering: 0x08 0x51 0xf9 0xdf 0x69 0xde 0xcc 0xdb
<6>[ 256.340000] IOCTL_SET_RESET
<4>[ 256.340000] scard_set_param :: clk = 27 | tangox_get_sysclock() = 200250000 | frequency = 3686400 | Mode = 0 | OC = 0
<4>[ 256.350000] Set param..>> Last_rev_msb = 0 || Last_rev_pol = 0
<4>[ 256.580000] Sleep for 100 jiffies.
<4>[ 257.580000] Got response from 5V setting ..
<4>[ 257.580000] Answering: 0x23 0xe1 0xb7 0xff 0xff 0xd5 0xdc 0x3f 0xff 0x0e 0x70 0xf6 0xff
<4>[ 257.580000] Wrong ts detected 0x23 (need to reverse the polarity and MSB)
<4>[ 257.600000] Ans2reset: warm reset needed.
<4>[ 257.610000] scard_set_param :: clk = 27 | tangox_get_sysclock() = 200250000 | frequency = 3686400 | Mode = 0 | OC = 0
<4>[ 257.620000] Set param..>> Last_rev_msb = 1 || Last_rev_pol = 1
<4>[ 257.800000] Sleep for 100 jiffies.
<4>[ 258.800000] Got response from 5V setting ..
<4>[ 258.800000] Answering: 0x3b 0x78 0x12 0x00 0x00 0x54 0xc4 0x03 0x00 0x8f 0xf1 0x90 0x00
<4>[ 258.800000] Correct ts detected 0x3b
<4>[ 258.800000] sci0: got response from the scard --> switch to normal
<6>[ 258.820000] read :3b ;
<6>[ 258.840000] read :78 x
<6>[ 258.850000] read :12 00 00 ...
<6>[ 258.850000] read :54 c4 03 00 8f f1 90 00 T.......
<6>[ 258.860000] IOCTL_SET_ATR_READY
<6>[ 258.870000] IOCTL_GET_PARAMETERS
<6>[ 258.870000] IOCTL_SET_PARAMETERS
<4>[ 258.870000] T=0 f=3686400 EGT=0 ETU=186
<6>[ 259.010000] IOCTL_GET_PARAMETERS
<6>[ 259.010000] IOCTL_SET_PARAMETERS
<4>[ 259.010000] T=0 f=3686400 EGT=0 ETU=372
<6>[ 259.030000] write :a4 a4 00 00 02 .....
<6>[ 259.150000] read :a4 .
<6>[ 259.180000] write :3f 20 ?
<6>[ 259.320000] read :9f .
<6>[ 259.350000] read :11 .
<6>[ 259.360000] write :a4 c0 00 00 11 .....
<6>[ 259.460000] read :c0 .
<6>[ 259.490000] read :df 0f 04 04 00 08 3f 00 01 00 f0 00 00 03 00 00 ......?.........
<6>[ 259.490000] read :00 .
<6>[ 259.510000] read :90 .
<6>[ 259.510000] read :00 .
<6>[ 259.540000] write :a4 a4 00 00 02 .....
<6>[ 259.610000] read :a4 .
<6>[ 259.640000] write :2f 01 /.
<6>[ 259.710000] read :9f .
<6>[ 259.730000] read :11 .
<6>[ 259.730000] write :a4 a2 00 00 01 .....
<6>[ 259.810000] read :a2 .
<6>[ 259.840000] write :d1 .
<6>[ 259.900000] read :9f .
<6>[ 259.920000] read :04 .
<6>[ 259.940000] write :a4 b2 00 00 04 .....
<6>[ 260.020000] read :b2 .
<6>[ 260.020000] read :d1 02 0d 96 ....
<6>[ 260.060000] read :90 .
<6>[ 260.100000] read :00 .
<6>[ 260.100000] write :a4 a2 00 00 01 .....
<6>[ 260.190000] read :a2 .
<6>[ 260.210000] write :80 .
<6>[ 260.330000] read :9f .
<6>[ 260.350000] read :07 .
<6>[ 260.350000] write :a4 b2 00 00 07 .....
<6>[ 260.480000] read :b2 .
<6>[ 260.500000] read :80 05 00 10 00 23 a3 .....#.
<6>[ 260.500000] read :90 .
<6>[ 260.520000] read :00 .
<6>[ 260.520000] write :a4 a2 00 00 01 .....
<6>[ 260.600000] read :a2 .
<6>[ 260.600000] write :9f .
<6>[ 260.670000] read :9f .
<6>[ 260.680000] read :03 .
<6>[ 260.680000] write :a4 b2 00 00 03 .....
<6>[ 260.760000] read :b2 .
<6>[ 260.760000] read :9f 01 04 ...
<6>[ 260.790000] read :90 .
<6>[ 260.790000] read :00 .
<6>[ 260.810000] write :a4 a2 00 00 01 .....
<6>[ 260.880000] read :a2 .
<6>[ 260.880000] write :c0 .
<6>[ 260.950000] read :9f .
<6>[ 260.980000] read :12 .
<6>[ 260.980000] write :a4 b2 00 00 12 .....
<6>[ 261.100000] read :b2 .
<6>[ 261.120000] read :c0 10 43 72 79 70 74 6f 57 6f 72 6b 73 00 00 00 ..CryptoWorks...
<6>[ 261.140000] read :00 00 ..
<6>[ 261.150000] read :90 .
<6>[ 261.150000] read :00 .
<6>[ 261.170000] write :a4 b0 00 00 60 ....`
<6>[ 261.230000] read :94 .
<6>[ 261.250000] read :08 .
<6>[ 261.250000] write :80 ff 10 01 05 .....
<6>[ 261.330000] read :6e n
<6>[ 261.330000] read :00 .
<6>[ 262.360000] IOCTL_SET_RESET
<4>[ 262.360000] scard_set_param :: clk = 27 | tangox_get_sysclock() = 200250000 | frequency = 3686400 | Mode = 1 | OC = 0
<4>[ 262.380000] Set param..>> Last_rev_msb = 0 || Last_rev_pol = 0
<4>[ 262.630000] Sleep for 100 jiffies.
<4>[ 263.630000] Got response from 5V setting ..
<4>[ 263.630000] Answering: 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
<4>[ 263.660000] Ans2reset: warm reset needed.
<4>[ 263.660000] scard_set_param :: clk = 27 | tangox_get_sysclock() = 200250000 | frequency = 3686400 | Mode = 1 | OC = 0
<4>[ 263.700000] Set param..>> Last_rev_msb = 0 || Last_rev_pol = 1
<4>[ 263.930000] Sleep for 100 jiffies.
<6>[ 264.340000] sci0: FIFO empty, go to sleep
<4>[ 264.930000] Got response from 5V setting ..
<4>[ 264.930000] Answering: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
<4>[ 264.950000] Ans2reset: warm reset needed.
<4>[ 264.970000] scard_set_param :: clk = 27 | tangox_get_sysclock() = 200250000 | frequency = 3686400 | Mode = 1 | OC = 0
<4>[ 264.990000] Set param..>> Last_rev_msb = 1 || Last_rev_pol = 1
<4>[ 265.390000] Sleep for 100 jiffies.
<4>[ 266.390000] Got response from 5V setting ..
<4>[ 266.390000] Answering: 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
<4>[ 266.420000] Ans2reset: warm reset needed.
<4>[ 266.420000] scard_set_param :: clk = 27 | tangox_get_sysclock() = 200250000 | frequency = 3686400 | Mode = 1 | OC = 0
<4>[ 266.440000] Set param..>> Last_rev_msb = 1 || Last_rev_pol = 0
<4>[ 266.690000] Sleep for 100 jiffies.
<4>[ 267.690000] Got response from 5V setting ..
<4>[ 267.690000] Answering: 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
<6>[ 268.000000] IOCTL_SET_RESET
<4>[ 268.000000] scard_set_param :: clk = 27 | tangox_get_sysclock() = 200250000 | frequency = 3686400 | Mode = 2 | OC = 0
<4>[ 268.030000] Set param..>> Last_rev_msb = 0 || Last_rev_pol = 0
<4>[ 268.340000] Sleep for 100 jiffies.
<4>[ 269.340000] Got response from 5V setting ..
<4>[ 269.340000] Answering: 0xe0 0xe0 0xfe 0xff 0xfe 0xfe 0xfe 0xff 0xff 0xff 0xff 0xe1 0xe0 0xff 0xff 0xe0 0xff 0xff 0xe0 0xff 0xe1 0xff 0xfe 0xe0 0xff
<4>[ 269.370000] Ans2reset: warm reset needed.
<4>[ 269.370000] scard_set_param :: clk = 27 | tangox_get_sysclock() = 200250000 | frequency = 3686400 | Mode = 2 | OC = 0
<4>[ 269.390000] Set param..>> Last_rev_msb = 0 || Last_rev_pol = 1
<4>[ 269.620000] Sleep for 100 jiffies.
<4>[ 270.620000] Got response from 5V setting ..
<4>[ 270.620000] Answering: 0x1f 0x1f 0x01 0x00 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x1e 0x1f 0x00 0x00 0x1f 0x00 0x00 0x1f 0x00 0x1e 0x00 0x01 0x1f 0x00
<4>[ 270.650000] Ans2reset: warm reset needed.
<4>[ 270.650000] scard_set_param :: clk = 27 | tangox_get_sysclock() = 200250000 | frequency = 3686400 | Mode = 2 | OC = 0
<4>[ 270.670000] Set param..>> Last_rev_msb = 1 || Last_rev_pol = 1
<4>[ 270.920000] Sleep for 100 jiffies.
<4>[ 271.920000] Got response from 5V setting ..
<4>[ 271.920000] Answering: 0xf8 0xf8 0x80 0x00 0x80 0x80 0x80 0x00 0x00 0x00 0x00 0x78 0xf8 0x00 0x00 0xf8 0x00 0x00 0xf8 0x00 0x78 0x00 0x80 0xf8 0x00
<4>[ 271.940000] Ans2reset: warm reset needed.
<4>[ 271.940000] scard_set_param :: clk = 27 | tangox_get_sysclock() = 200250000 | frequency = 3686400 | Mode = 2 | OC = 0
<4>[ 271.960000] Set param..>> Last_rev_msb = 1 || Last_rev_pol = 0
<4>[ 272.140000] Sleep for 100 jiffies.
<4>[ 273.140000] Got response from 5V setting ..
<4>[ 273.140000] Answering: 0x07 0x07 0x7f 0xff 0x7f 0x7f 0x7f 0xff 0xff 0xff 0xff 0x87 0x07 0xff 0xff 0x07 0xff 0xff 0x07 0xff 0x87 0xff 0x7f 0x07 0xff
<6>[ 273.440000] IOCTL_SET_DEACTIVATE
<6>[ 274.450000] IOCTL_SET_RESET
<4>[ 274.450000] scard_set_param :: clk = 27 | tangox_get_sysclock() = 200250000 | frequency = 3686400 | Mode = 3 | OC = 0
<4>[ 274.460000] Set param..>> Last_rev_msb = 0 || Last_rev_pol = 0
<4>[ 274.630000] Sleep for 100 jiffies.
<4>[ 275.630000] Got response from 5V setting ..
<4>[ 275.630000] Answering: 0xff 0xe0 0xff 0xff
<4>[ 275.630000] Ans2reset: warm reset needed.
<4>[ 275.650000] scard_set_param :: clk = 27 | tangox_get_sysclock() = 200250000 | frequency = 3686400 | Mode = 3 | OC = 0
<4>[ 275.660000] Set param..>> Last_rev_msb = 0 || Last_rev_pol = 1
<4>[ 275.850000] Sleep for 100 jiffies.
<4>[ 276.850000] Got response from 5V setting ..
<4>[ 276.850000] Answering: 0x1f 0x1f 0x01 0x00 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x1e 0x1f 0x00 0x00 0x1f 0x00 0x00 0x1f 0x00 0x1e 0x00 0x01 0x1f 0x00
<4>[ 276.870000] Ans2reset: warm reset needed.
<4>[ 276.870000] scard_set_param :: clk = 27 | tangox_get_sysclock() = 200250000 | frequency = 3686400 | Mode = 3 | OC = 0
<4>[ 276.880000] Set param..>> Last_rev_msb = 1 || Last_rev_pol = 1
<4>[ 277.060000] Sleep for 100 jiffies.
<4>[ 278.060000] Got response from 5V setting ..
<4>[ 278.060000] Answering: 0xf8 0xf8 0x80 0x00 0x80 0x80 0x80 0x00 0x00 0x00 0x00 0x78 0xf8 0x00 0x00 0xf8 0x00 0x00 0xf8 0x00 0x78 0x00 0x80 0xf8 0x00
<4>[ 278.090000] Ans2reset: warm reset needed.
<4>[ 278.090000] scard_set_param :: clk = 27 | tangox_get_sysclock() = 200250000 | frequency = 3686400 | Mode = 3 | OC = 0
<4>[ 278.110000] Set param..>> Last_rev_msb = 1 || Last_rev_pol = 0
<4>[ 278.310000] Sleep for 100 jiffies.
<4>[ 279.310000] Got response from 5V setting ..
<4>[ 279.310000] Answering: 0xff 0x07 0xff 0xff
<6>[ 279.600000] IOCTL_SET_RESET
<4>[ 279.600000] scard_set_param :: clk = 27 | tangox_get_sysclock() = 200250000 | frequency = 3686400 | Mode = 4 | OC = 0
<4>[ 279.620000] Set param..>> Last_rev_msb = 0 || Last_rev_pol = 0
<4>[ 279.850000] Sleep for 100 jiffies.
<4>[ 280.850000] Got response from 5V setting ..
<4>[ 280.850000] Answering: 0xff 0xff 0xff
<4>[ 280.870000] Ans2reset: warm reset needed.
<4>[ 280.870000] scard_set_param :: clk = 27 | tangox_get_sysclock() = 200250000 | frequency = 3686400 | Mode = 4 | OC = 0
<4>[ 280.890000] Set param..>> Last_rev_msb = 0 || Last_rev_pol = 1
<4>[ 281.160000] Sleep for 100 jiffies.
<4>[ 282.160000] Got response from 5V setting ..
<4>[ 282.160000] Answering: 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01 0x00 0x00 0x01 0x00 0x00 0x01 0x00 0x01 0x00 0x00 0x00 0x01 0x00
<4>[ 282.200000] Ans2reset: warm reset needed.
<4>[ 282.200000] scard_set_param :: clk = 27 | tangox_get_sysclock() = 200250000 | frequency = 3686400 | Mode = 4 | OC = 0
<4>[ 282.240000] Set param..>> Last_rev_msb = 1 || Last_rev_pol = 1
<4>[ 282.570000] Sleep for 100 jiffies.
Re: Open PLi 6.1
Napsal: 24 črc 2018, 07:46
od Bond
Tiez spekulujem prejst z Open PLI2.1 na Open PLI 6.1
Chcem sa opytat ci treba rozdelovat Pamat, alebo sa moze rovno nainstalovat cez AzUp, alebo nejaky iny program?
Re: Open PLi 6.1
Napsal: 25 črc 2018, 11:06
od JohnCenaWWE
ja to mam na usb
Re: Open PLi 6.1
Napsal: 26 črc 2018, 07:22
od Bond
Tak som to nainstaloval cez AzUp 2.2.8 na redukciu s SD kartou 4GB a zatial ide OK

Re: Open PLi 6.1
Napsal: 08 srp 2018, 20:22
od Fishburn
chceto grab screen z webinfa o přijimači info

Re: Open PLi 6.1
Napsal: 08 srp 2018, 20:24
od Fishburn
tohle ..
Formuler_F4_turbo_-_OpenWebif_-_2018-08-08_20.23.22.png
Re: Open PLi 6.1
Napsal: 05 lis 2018, 17:26
od blackie
Skúšal už niekto nainštalovať verziu OpenATV 6.3 ?